Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
Table 33: SSO Limit per VCCO/GND Pair (Cont’d)
SSO Limit per V
/GND Pair
CCO
All TQG144, CPG196,
CSG225, FT(G)256, and
LX devices in CSG324
All CSG484, FG(G)484,
FG(G)676, FG(G)900, and
LXT devices in CSG324
V
I/O Standard
Drive
Slew
CCO
Bank 0/2
Bank 1/3
Bank 0/2
Bank 1/3/4/5
Fast
42
50
60
21
32
39
14
19
29
11
15
25
1
46
55
68
27
37
42
19
25
30
15
20
24
3
42
50
60
21
32
39
14
19
29
11
15
25
1
44
49
60
25
32
37
17
22
25
14
18
20
1
2
4
Slow
QuietIO
Fast
Slow
QuietIO
Fast
6
Slow
QuietIO
Fast
3.3V
LVCMOS33
8
Slow
QuietIO
Fast
12
16
24
Slow
2
5
2
2
QuietIO
Fast
4
9
4
7
1
2
1
1
Slow
1
5
1
1
QuietIO
Fast
3
10
2
3
8
1
1
1
Slow
2
5
2
1
QuietIO
7
9
7
7
DS162 (v1.9) August 23, 2010
www.xilinx.com
Advance Product Specification
33
XILINX [ XILINX, INC ]
