R
Virtex-II Platform FPGAs: Pinout Information
Table 6: FG256/FGG256 BGA — XC2V40, XC2V80, XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number
No Connect in XC2V40 No Connect in XC2V80
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
IO_L96N_3
IO_L96P_3
J16
J15
J14
J13
K16
K15
K14
K13
K12
L12
L16
L15
L14
L13
M16
M15
M14
M13
N15
N14
N16
P16
IO_L94N_3
IO_L94P_3
IO_L93N_3/VREF_3
IO_L93P_3
NC
NC
NC
NC
IO_L91N_3
IO_L91P_3
IO_L45N_3/VREF_3
IO_L45P_3
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IO_L43N_3
IO_L43P_3
IO_L06N_3
IO_L06P_3
IO_L04N_3
IO_L04P_3
IO_L03N_3/VREF_3
IO_L03P_3
IO_L02N_3/VRP_3
IO_L02P_3/VRN_3
IO_L01N_3
IO_L01P_3
(1)
4
4
4
4
4
4
4
4
4
4
IO_L01N_4/BUSY/DOUT
IO_L01P_4/INIT_B
T14
T13
P13
R13
N12
P12
R12
T12
N11
P11
(1)
IO_L02N_4/D0/DIN
IO_L02P_4/D1
IO_L03N_4/D2/ALT_VRP_4
IO_L03P_4/D3/ALT_VRN_4
IO_L04N_4/VREF_4
IO_L04P_4
NC
NC
NC
NC
NC
NC
NC
NC
IO_L05N_4/VRP_4
IO_L05P_4/VRN_4
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
12
XILINX [ XILINX, INC ]
