X1241 – Preliminary Information
terminates the transfer by generating a stop condition.
The X1241 then begins an internal write cycle of the
data to the nonvolatile memory. During the internal
write cycle, the device inputs are disabled, so the
device will not respond to any requests from the master.
The SDA output is at high impedance. See Figure 6.
A write to a protected block of memory is ignored, but
will still receive an acknowledge. At the end of the write
command, the X1241 will not initiate an internal write
cycle, and will continue to ACK commands.
Figure 10. Byte Write Sequence
S
S
t
a
r
Signals from
the Master
Word
Word
Address 0
Slave
Address
t
Data
Address 1
0 0 0 0
0
o
p
t
SDA Bus
1 1 1
1
0
Signals from
the Slave
A
C
K
A
C
K
A
C
K
A
C
K
Figure 11. Writing 30 bytes to a 64-byte page starting at Address 40.
7 Bytes
23 Bytes
Address Pointer
Address
40
Address
= 6
Address
63
Ends Here
Addr = 7
Figure 12. Page Write Sequence
(1 ≤ n ≤ 64)
S
Word
Address 1
Slave
Address
Word
Address 0
Data
(1)
Data
(n)
S
t
o
p
t
a
r
Signals from
the Master
t
SDA Bus
1
1 1 1 0
0 0 0 0 0
A
C
K
A
C
K
A
C
K
A
C
K
Signals from
the Slave
Characteristics subject to change without notice. 10 of 22
REV 1.1.3 2/13/01
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