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WM8777SEFT 参数 Datasheet PDF下载

WM8777SEFT图片预览
型号: WM8777SEFT
PDF下载: 下载PDF文件 查看货源
内容描述: 24位192KHZ AV接收机芯片 [24 BIT 192KHZ AV RECEIVER ON A CHIP]
分类和应用: 接收机
文件页数/大小: 102 页 / 1257 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8777  
OUTPUT SELECT AND ENABLE CONTROL  
Register bits MX1[2:0] to MX4[2:0] control the output select. The output select block consists of a  
summing stage and an input select switch for each input allowing each signal to be output  
individually or summed with other signals and output on each analogue output. The default for all  
outputs is DAC playback only. VOUT1/2/3 may be selected to output DAC playback, AUX, analogue  
bypass or a sum of these using the output select controls MX1/2/3[2:0]. VOUT4 may be selected to  
output DAC playback, analogue bypass or a sum of these signals using MX4[1:0]. It is recommended  
that bypass is not selected for output on more than two stereo channels simultaneously to avoid  
overloading the input buffer, resulting in a decrease in performance.  
The output mixers and PGAs can be powered down under control of OUTPD1/2/3/4. Each stereo  
channel may be powered down separately. Setting OUTPD1/2/3/4 will power off the mixer and PGA  
and switch the analogue outputs VOUTL/R to VMIDDAC to maintain a dc level on the output.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
(32h)  
001  
VOUT1 Output select (see Figure 28)  
2:0  
5:3  
2:0  
4:3  
MX1[2:0]  
MX2[2:0]  
MX3[2:0]  
MX4[1:0]  
Output Mux  
and  
Powerdown  
Control 1  
(DAC playback)  
001  
VOUT2 Output select (see Figure 28)  
VOUT3 Output select (see Figure 28)  
(DAC playback)  
(33h)  
001  
Output Mux  
and  
Powerdown  
Control 2  
(DAC playback)  
01  
VOUT4 Output select (see Figure 29)  
(DAC playback)  
Table 66 Output Mux Register  
Figure 28 MX1/2/3[2:0] Output Select  
Figure 29 MX4[1:0] Output Select  
PP Rev 1.94 November 2004  
65  
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