欢迎访问ic37.com |
会员登录 免费注册
发布采购

WM8777SEFT 参数 Datasheet PDF下载

WM8777SEFT图片预览
型号: WM8777SEFT
PDF下载: 下载PDF文件 查看货源
内容描述: 24位192KHZ AV接收机芯片 [24 BIT 192KHZ AV RECEIVER ON A CHIP]
分类和应用: 接收机
文件页数/大小: 102 页 / 1257 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
 浏览型号WM8777SEFT的Datasheet PDF文件第57页浏览型号WM8777SEFT的Datasheet PDF文件第58页浏览型号WM8777SEFT的Datasheet PDF文件第59页浏览型号WM8777SEFT的Datasheet PDF文件第60页浏览型号WM8777SEFT的Datasheet PDF文件第62页浏览型号WM8777SEFT的Datasheet PDF文件第63页浏览型号WM8777SEFT的Datasheet PDF文件第64页浏览型号WM8777SEFT的Datasheet PDF文件第65页  
Product Preview  
WM8777  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
(04h)  
6:0  
SURLA  
[6:0]  
1101011  
(0dB)  
0
Analogue Attenuation control for SURL in 1dB steps. See Table 60.  
Analogue  
Attenuation  
SURL  
7
8
SURLZCEN  
SURL zero cross detect enable  
0 = zero cross disabled  
1 = zero cross enabled  
UPDATE  
Not latched  
Controls simultaneous update of all Analogue Attenuation Latches  
0 = Store SURL in intermediate latch (no change to output)  
1 = Store SURL and update attenuation on all channels.  
Analogue Attenuation control for SUR Right in 1dB steps.  
(05h)  
6:0  
7
SURRA  
[6:0]  
1101011  
(0dB)  
Analogue  
Attenuation  
SURR  
SURRZCEN  
0
SURR zero cross detect enable  
0 = zero cross disabled  
1 = zero cross enabled  
8
UPDATE  
Not latched  
Controls simultaneous update of all Analogue Attenuation Latches  
0 = Store SURR in intermediate latch (no change to output)  
1 = Store SURR and update attenuation on all channels.  
Analogue Attenuation control for AUXL in 1dB steps. See Table 60.  
(06h)  
6:0  
7
AUXLA[6:0]  
AUXLZCEN  
1101011  
(0dB)  
0
Analogue  
Attenuation AUXL  
AUXL zero cross detect enable  
0 = zero cross disabled  
1 = zero cross enabled  
8
UPDATE  
Not latched  
Controls simultaneous update of all Analogue Attenuation Latches  
0 = Store AUXL in intermediate latch (no change to output)  
1 = Store AUXL and update attenuation on all channels.  
Analogue Attenuation control for AUXR in 1dB steps. See Table 60.  
(07h)  
6:0  
7
AUXRA[6:0]  
AUXRZCEN  
1101011  
(0dB)  
0
Analogue  
Attenuation AUXR  
AUXR zero cross detect enable  
0 = zero cross disabled  
1 = zero cross enabled  
8
UPDATE  
Not latched  
Controls simultaneous update of all Analogue Attenuation Latches  
0 = Store AUXR in intermediate latch (no change to output)  
1 = Store AUXR and update attenuation on all channels.  
(08h)  
6:0  
7
HPLA[6:0]  
HPLZCEN  
1101011  
(0dB)  
0
Analogue Attenuation control for HPHONEL in 1dB steps. See Table  
60.  
Analogue  
Attenuation  
HPHONEL  
HPHONEL zero cross detect enable  
0 = zero cross disabled  
1 = zero cross enabled  
8
UPDATE  
Not latched  
Controls simultaneous update of all Analogue Attenuation Latches  
0 = Store HPHONEL in intermediate latch (no change to output)  
1 = Store HPHONEL and update attenuation on all channels.  
(09h)  
6:0  
7
HPRA[6:0]  
HPRZCEN  
1101011  
(0dB)  
0
Analogue Attenuation control for HPHONER in 1dB steps. See Table  
60.  
Analogue  
Attenuation  
HPHONER  
HPHONER zero cross detect enable  
0 = zero cross disabled  
1 = zero cross enabled  
8
UPDATE  
Not latched  
Controls simultaneous update of all Analogue Attenuation Latches  
0 = Store HPHONER in intermediate latch (no change to output)  
1 = Store HPHONER and update attenuation on all channels.  
PP Rev 1.94 November 2004  
61  
w
 复制成功!