Product Preview
WM8777
The gain control circuit is enabled by setting the LCEN control bit. The user can select between
Limiter mode and three different ALC modes using the LCSEL control bits.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
(1Eh)
8
LCEN
0
Enable the PGA gain control circuit.
0 = PGA gain control disabled
1 = PGA gain control enabled
ALC/Limiter function select
00 = Limiter
ALC Control 2
(1Dh)
8:7
LCSEL[1:0]
00
ALC Control 1
01 = ALC Right channel only
10 = ALC Left channel only
11 = ALC Stereo
Table 72 ALC Control Registers
The limiter function only operates in stereo, which means that the peak detector takes the maximum
of left and right channel peak values, and any new gain setting is applied to both left and right PGAs,
so that the stereo image is preserved. However, the ALC function can also be enabled on one
channel only. In this case, only one PGA is controlled by the ALC mechanism, while the other
channel runs independently with its PGA gain set through the control register.
When enabled, the threshold for the limiter or target level for the ALC is programmed using the LCT
control bits. This allows the threshold/target level to be programmed between -1dB and -16dB in 1dB
steps. Note that for the ALC, target levels of -1dB and -2dB give a threshold of -3dB. This is because
the ALC can give erroneous operation if the target level is set too high.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
(1Dh)
3:0
LCT[3:0]
1011
Limiter Threshold/ALC target level in
1dB steps.
ALC Control 1
(-6dB)
0000 = -16dB FS
0001 = -15dB FS
…
1101 = -3dB FS
1110 = -2dB FS
1111 = -1dB FS
Table 73 Limiter Threshold Register
ATTACK AND DECAY TIMES
The limiter and ALC have different attack and decay times which determine their operation. However,
the attack and decay times are defined slightly differently for the limiter and for the ALC. DCY and
ATK control the decay and attack times, respectively.
Decay time (Gain Ramp-Up). When in ALC mode, this is defined as the time that it takes for the
PGA gain to ramp up across 90% of its range (e.g. from –21dB up to +20 dB). When in limiter mode,
it is defined as the time it takes for the gain to ramp up by 6dB.
The decay time can be programmed in power-of-two (2n) steps. For the ALC this gives times from
33.6ms, 67.2ms, 134.4ms etc. to 34.41s. For the limiter this gives times from 1.2ms, 2.4ms etc., up
to 1.2288s. However, the decay time for the limiter can also be made dependant on the input
frequency by setting the FDECAY control bit. For a 1kHz input signal this gives decay times of 24ms,
48ms etc., up to 24.576s.
Attack time (Gain Ramp-Down) When in ALC mode, this is defined as the time that it takes for the
PGA gain to ramp down across 90% of its range (e.g. from +20dB down to -21dB gain). When in
limiter mode, it is defined as the time it takes for the gain to ramp down by 6dB.
The attack time can be programmed in power-of-two (2n) steps, from 8.4ms, 16.8ms, 33.6ms etc. to
8.6s for the ALC and from 250us, 500us, etc. up to 256ms.
The time it takes for the recording level to return to its target value or static gain value therefore
depends on both the attack/decay time and on the gain adjustment required. If the gain adjustment is
small, it will be shorter than the attack/decay time.
PP Rev 1.94 November 2004
69
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
