W90N745CD/W90N745CDG
BITS
DESCRIPTIONS
[31:24]
Reserved
TIC
Reserved
Timer Initial Count
This is a 24-bit value representing the initial count. Timer will reload
this value whenever the counter is decremented to zero.
NOTE1: Never write 0x0 in TIC, or the core will run into unknown
state.
[23:0]
NOTE2: No matter CEN is 0 or 1, whenever software write a new
value into this register, TIMER will restart counting using this new
value and abort previous count.
Timer Data Register 0/1 (TDR0/1)
REGISTER
TDR0
ADDRESS
R/W
DESCRIPTION
Timer Data Register 0
Timer Data Register 1
RESET VALUE
0xFFF8_10010
R
0x0000_0000
0xFFF8_10014
R
0x0000_0000
TDR1
31
30
22
14
6
29
28
Reserved
27
19
26
18
10
2
25
17
9
24
16
8
23
21
13
5
20
TDR[23:16]
15
12
11
3
TDR [15:8]
7
4
1
0
TDR[7:0]
BITS
DESCRIPTIONS
[31:24]
Reserved
TDR
Reserved
Timer Data Register
The current count is registered in this 24-bit value.
[23:0]
NOTE: Software can read a correct current value on this register only
when CEN = 0, or the value represents here could not be a correct
one.
Publication Release Date: September 22, 2006
- 291 -
Revision A2
WINBOND [ WINBOND ]
