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W90N745CDG 参数 Datasheet PDF下载

W90N745CDG图片预览
型号: W90N745CDG
PDF下载: 下载PDF文件 查看货源
内容描述: 16位/ 32位ARM微控制器 [16/32-bit ARM microcontroller]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 422 页 / 2455 K
品牌: WINBOND [ WINBOND ]
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W90N745CD/W90N745CDG  
Continued  
BITS  
DESCRIPTIONS  
Watchdog Timer Interrupt Enable  
[6]  
0 = Disable the Watchdog timer interrupt  
1 = Enable the Watchdog timer interrupt  
WTIE  
Watchdog Timer Interval Select  
These two bits select the interval for the Watchdog timer. No matter  
which interval is chosen, the reset timeout is always occurred 512  
WDT clock cycles later than the interrupt timeout.  
Interrupt  
Timeout  
Real Time Interval  
(CLK=15MHz/256)  
WTIS  
00  
Reset Timeout  
214 + 1024  
clocks  
216 + 1024  
clocks  
218 + 1024  
clocks  
220 + 1024  
clocks  
0.28 sec.  
1.12 sec.  
4.47 sec.  
17.9 sec.  
214 clocks  
216 clocks  
218 clocks  
220 clocks  
[5:4]  
WTIS  
01  
10  
11  
Watchdog Timer Interrupt Flag  
If the Watchdog timer interrupt is enabled, then the hardware will set  
this bit to indicate that the Watchdog timer interrupt has occurred. If  
the Watchdog timer interrupt is not enabled, then this bit indicates that  
a timeout period has elapsed.  
[3]  
WTIF  
0 = Watchdog timer interrupt does not occur  
1 = Watchdog timer interrupt occurs  
NOTE: This bit is read only, but can be cleared by writing 1 to this bit.  
Watchdog Timer Reset Flag  
When the Watchdog timer initiates a reset, the hardware will set this  
bit. This flag can be read by software to determine the source of  
reset. Software is responsible to clear it up manually. If WTRE is  
disabled, then the Watchdog timer has no effect on this bit.  
[2]  
WTRF  
0 = Watchdog timer reset does not occur  
1 = Watchdog timer reset occurs  
NOTE: This bit is read only, but can be cleared by writing 1 to this bit.  
Publication Release Date: September 22, 2006  
- 295 -  
Revision A2  
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