W90N745CD/W90N745CDG
Continued
BITS
DESCRIPTIONS
Counter Reset
Set this bit will reset the TIMER counter, and also force CEN to 0.
[26]
[25]
CRST
CACT
0 = No effect.
1 = Reset Timer’s prescale counter, internal 24-bit counter and
CEN.
Timer is in Active
This bit indicates the counter status of timer.
0 = Timer is not active.
1 = Timer is in active.
[24:8]
[7:0]
Reserved
Reserved
Prescale
PRESCALE
Clock input is divided by PRESCALE+1 before it is fed to the
counter. If PRESCALE=0, then there is no scaling.
Timer Initial Count Register 0/1 (TICR0/1)
REGISTER
TICR0
ADDRESS
R/W
DESCRIPTION
RESET VALUE
0xFFF8_1008 R/W Timer Initial Control Register 0
0xFFF8_100C R/W Timer Initial Control Register 1
0x0000_0000
0x0000_0000
TICR1
31
30
22
14
6
29
21
13
5
28
20
27
19
26
18
10
2
25
17
9
24
16
8
Reserved
23
TIC[23:16]
12 11
15
TIC [15:8]
7
4
3
1
0
TIC[7:0]
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