WED3DL644V
White Electronic Designs
FIG. 17 MODE REGISTER SET CYCLE
FIG. 18 AUTO REFRESH CYCLE
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
9
10
CLOCK
HIGH
HIGH
CKE
CE#
Note 2
tRFC
RAS#
Note 1
Note 3
CAS#
ADDR
Key
Ra
DQ
HI-Z
HI-Z
WE#
DQM
MRS
New
Command
Auto Refresh
New Command
DON'T CARE
NOTES:
Both banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.
MODE REGISTER SET CYCLE
1.
2.
3.
CE#, RAS#, CAS#, & WE# activation at the same clock cycle with address key will set internal mode register.
Minimum 2 clock cycles should be met before new RAS# activation.
Please refer to Mode Register Set table.
August 2005
Rev. 6
26
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
