VSC6134
Datasheet
4.5
Power Supply Dissipation Requirements
This section contains the power dissipation requirements for the VSC6134 device. In each table in the
following sections, P is lower by approximately 0.5 W with all blocks enabled and with the client FEC
D
and Ethernet MACs disabled.
The following table contains the 1.2 V core supply absolute maximum power dissipation (P ).
D12
Table 452. 1.2 V Core Supply Absolute Maximum Power Dissipation
Symbol
Parameter
Maximum
Unit
PDME
StFEC to EFEC mode (maximum correctable
errors)
3
W
The following table contains the 1.2 V core supply power dissipation (P ).
D12
Table 453. 1.2 V Core Supply Power Dissipation
Symbol
Parameter
Typical
Maximum
Unit
PD12
StFEC to StFEC mode - no line errors
(all blocks powered up)
2.2
2.7
W
PD12
SONET to StFEC mode (maximum correctable
errors)
1.3
1.5
W
The following table contains the 2.5 V LVDS I/O supply power dissipation (P ).
D25
Table 454. 2.5 V LVDS I/O Supply Power Dissipation
Symbol
Parameter
Typical
Maximum
Unit
PD25
Power dissipation of the 2.5 V supply
2.3
2.9
W
The following table contains the 3.3 V LVTTL I/O supply power dissipation (P ).
D33
Table 455. 3.3 V LVTTL I/O Supply Power Dissipation
Symbol
Parameter
Typical
Maximum
Unit
PD33
Power dissipation of the 3.3 V supply
0.16
0.4
W
The following table contains the maximum total power.
Table 456. Maximum Total Power
Symbol
PTOTAL
Parameter
Typical
Maximum
Unit
StFEC to EFEC mode (all blocks powered up)
4.66
6.3
W
406 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
