VSC6134
Datasheet
3.8.67
Enhanced FEC 1 Uncorrectable Code Word Count (MSW)
Address:
0x743
Register Reset Value:
0x0000
Table 268. Enhanced FEC 1 Uncorrectable Code Word Count (MSW)
Reset
Value
Bit
Name
Access
Description
15:0
EFEC1_UCW_UPR
RO
Count of total number of uncorrectable code words from
EFEC decoder 1 (upper 16 bits of 32 bit count)
0x0000
3.8.68
Enhanced FEC 2 Uncorrectable Code Word Count (LSW)
Address:
0x744
Register Reset Value:
0x0000
Table 269. Enhanced FEC 2 Uncorrectable Code Word Count (LSW)
Reset
Value
Bit
Name
Access
Description
15:0
EFEC2_UCW_LWR
RO
Count of total number of uncorrectable code words from
EFEC decoder 2 (lower 16 bits of 32 bit count)
0x0000
3.8.69
Enhanced FEC 2 Uncorrectable Code Word Count (MSW)
Address:
0x745
Register Reset Value:
0x0000
Table 270. Enhanced FEC 2 Uncorrectable Code Word Count (MSW)
Reset
Value
Bit
Name
Access
Description
15:0
EFEC2_UCW_UPR
RO
Count of total number of uncorrectable code words from
EFEC decoder 2 (upper 16 bits of 32 bit count)
0x0000
3.8.70
Enhanced FEC 3 Uncorrectable Code Word Count (LSW)
Address:
0x746
Register Reset Value:
0x0000
Table 271. Enhanced FEC 3 Uncorrectable Code Word Count (LSW)
Reset
Value
Bit
Name
Access
Description
15:0
EFEC3_UCW_LWR
RO
Count of total number of uncorrectable code words from
EFEC decoder 3 (lower 16 bits of 32 bit count)
0x0000
314 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
