VSC6134
Datasheet
3.8.63
DW Path Monitor BEI Count Register (LSW)
Address:
0xF3F: Add Path
0x73F: Drop Path
0x0000
Register Reset Value:
Table 264. DW Path Monitor BEI Count Register (LSW)
Reset
Value
Bit
Name
Access
Description
15:0
PM_BEICNT[15:0]
RO
PM BEI counter LSW
0x0000
3.8.64
Enhanced FEC Total Corrected Bit Error Count (LSW)
Address:
0x740
Register Reset Value:
0x0000
Table 265. Enhanced FEC Total Corrected Bit Error Count (LSW)
Reset
Value
Bit
Name
Access
Description
15:0
EFEC_TOTAL_ERR_LWR
RO
Count of total number of correctable bit errors in the four
decoders (lower 16 bits of 32 bit count)
0x0000
3.8.65
Enhanced FEC Total Corrected Bit Error Count (MSW)
Address:
0x741
Register Reset Value:
0x0000
Table 266. Enhanced FEC Total Corrected Bit Error Count (MSW)
Reset
Value
Bit
Name
Access
Description
15:0
EFEC_TOTAL_ERR_UPR
RO
Count of total number of correctable bit errors in the four
decoders (upper 16 bits of 32 bit count)
0x0000
3.8.66
Enhanced FEC 1 Uncorrectable Code Word Count (LSW)
Address:
0x742
Register Reset Value:
0x0000
Table 267. Enhanced FEC 1 Uncorrectable Code Word Count (LSW)
Reset
Value
Bit
Name
Access
Description
15:0
EFEC1_UCW_LWR
RO
Count of total number of uncorrectable code words from
EFEC decoder 1 (lower 16 bits of 32 bit count)
0x0000
313 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
