VSC6134
Datasheet
Table 10. SOH Generator Block I/O Description (continued)
Name
Direction
IN
Function
MPU_WRENA
MPU_WDATA[15:0]
MPU_ADDR[11:0]
SOHGEN_RDATA[15:0]
SOHGEN_INT
SOHGEN_DTK
Microprocessor write enable signal.
Microprocessor write input data bus.
Microprocessor address bus.
IN
IN
OUT
OUT
OUT
SOH generator read output data bus.
SOH generator active high interrupt signal.
SOH generator data acknowledgement pulse.
2.5.1
A1 and A2 Generator
The VSC6134 processes only the regenerator section and multiplex section overhead, with a back-to-
back receiver and transmitter. As such, there is no need for the device to source the A1 and A2 framing
bytes during normal operation (A1 and A2 bytes are passed from the receive SOH block transparently).
However, when the receive SOH block detects LOS or LOF, the frame generator (in the transmit SOH
block) must generate an STS-192 frame and source the framing bytes. The frame generator’s other
function is to insert framing pattern errors on-demand for test purposes. When the provisionable
configuration bit FER_INSERT is set to 1, the framing pattern is corrupted for test purposes. Note that
the framing pattern insertion may be provisionally disabled using configuration bit A1A2_SOURCE.
2.5.2
AIS-L Generator
An AIS-L defect is generated downstream automatically when a section regenerator detects LOS or
LOF if automatic AIS insertion is enabled using the configuration bit AISAUTOENA. AIS-L consists of
an STS-192 signal with a valid section overhead and an all-ones pattern in the remainder of the frame.
Scrambling is done following the all-ones pattern insertion. AIS-L should be deactivated within 125 ms
of clearing the failure (LOS or LOF). AIS-L can also be activated manually (on-demand) using the
configuration bit AISMANUENA. The SOH generator only generates AIS-L if the VSC6134 device is
configured to perform section termination. If the VSC6134 device is configured as a line terminator, the
SOH generator does not generate AIS-L, but regenerates the section overhead if AIS-P condition is
being generated in the same path.
For more information, see the following table.
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VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
