VSC6134
Datasheet
2.1.5
Line DCC Monitor (D4 to D12)
The bytes D4 to D12 are allocated in the first STS-1 of the SONET/SDH frame for the line data
communication channel. LDCC is considered to be one 576 Kbps [9 × 64] message-based channel for
alarms, maintenance, control, monitoring, administration, and other data communication needs between
LTEs (SONET lite terminating equipment).
The monitor collects LDCC bytes for 24 consecutive frames (3 ms), stores it in the memory
LDCCBYTE[108x16], and makes it available for the microprocessor. As soon as the memory is
updated, the status bit LDCC_S is set, and a microprocessor interrupt is generated if the interrupt mask
bit LDCC_M = 0. The system then has 3 ms to access memory, before it is overwritten with a new
LDCC message, which significantly minimizes the number of microprocessor interrupts. Storage is
implemented as two ping-pong memory banks (two 108 × 16 register arrays). While the bank A is
getting updated, bank B is accessed by the microprocessor interface. After the new message is filled in
bank A, the banks are switched. Now bank A is accessed by the microprocessor, and bank B is ready for
receiving new LDCC bytes. The LDCC monitoring is disabled when any of the following alarms are
active: LOS, LOF, SEF, or AIS_L.
2.1.6
2.1.7
E2 Byte Monitor
The E2 byte is allocated in the first STS-1 of STS-192/STM-64 for an express orderwire between LTEs.
The block extracts E2 byte from LOH of each STS-192 frame and stores it in the 8-bit register
E2BYTE[7:0] for the system to access using the microprocessor interface. As soon as the register is
loaded, the status bit E1NEW_S is set and a microprocessor interrupt is generated, if interrupt mask bit
E1NEW_M = 0. The E2 byte monitoring is disabled when any of the following alarms are active: LOS,
LOF, SEF, or AIS_L.
LOH Monitor Register Information
For information about the LOH monitor registers and configuration bits, see “Line Overhead Monitor
Registers,” page 226.
53 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
