TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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Bit
7
6
5
4
3
2
1
0
Function A6 A5 A4 A3 A2 A1 A0 R/nW
Table 202: I2C Addres register
I2C_DATA_R – Data register for received data
After a read command, this register contains the last read data byte.
I2C_DATA_W – Data register for data to transmit
The data byte that should be sent with the next write command is written to this register.
Basic usage An usual communication cycle is done by the following steps
1. Set the bit duration in µs in the I2C_TIMEBASE register (only required as configuration after reset or if
a different speed is required).
2. Write 0x20 (Send Start Condition) to the I2C_CONTROL register.
3. Write the slave address and the R/nW bit to the I2C_ADDR register.
4. Write 0x80 (Send Address) to the I2C_CONTROL register.
5. Depending on the R/nW bit, either
•
Write 0x01 (Receive Data and send NACK) or 0x02 (Receive Data and send ACK) to I2C_CONTROL
to receive data and send NACK or ACK.
• Read the data from the I2C_DATA_R register.
or
• Write data to the I2C_DATA_W register.
• Write 0x04 (Send Data)to I2C_CONTROL to send the data.
This can be repeated as long as it is necessary.
6. Write 0x10 (Send Stop Condition) to the I2C_CONTROL register.
A repeated start condition, as it is required for slaves like EEPROMs, can be sent like the regular start
condition by writing 0x20 to the I2C_CONTROL register at any required time.
7.13.1 I2C Example
This Example shows reading from an 24LC64 I2C EEPROM. The standard I2C address is configurable from
0x50 to 0x57 with 3 address pins. The address 0x50 is used for this example. The memory uses 13 bit
addresses, so two memory address bytes are used. The memory address 0x1234 is used for this example.
1. Set I2C clock to 100kHz (10µs)
I2C_TIMEBASE <= 0x0A
2. Send Start Condition
I2C_CONTROL <= 0x20
3. Write the slave address and the nW bit ((0x50 « 1) + 0 = 0xA0)
I2C_ADDR <= 0xA0
4. Send Address
I2C_CONTROL <= 0x80
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