TS7001
example, P1.0) to generate a serial clock and using
two other I/O ports (for example, P1.1 for DOUT and
P1.2 for DIN) to transfer data from/to the TS7001.
operation, two consecutive read/write operations are
required. For additional information, please consult
the PIC16/PIC17 Microcontroller User Manual.
A TS7001 to PIC16C6x/PIC16C7x Microcontroller
Interface
As shown in Figure 20, the connection between the
TS7001 and the PIC16C6x/PIC16C7x is simple and
does not require any glue logic circuits. The
PIC16C6x synchronous serial port (SSP) is
configured as an SPI master with its clock polarity bit
set to 1 by writing to the synchronous serial port
control register (SSPCON). In this example, I/O port
Figure 20: Interfacing the TS7001 to
PIC16C6x/PIC16C7x-type Microcontrollers.
RA1 is being used to generate the TS7001’s CS
signal. Since this microcontroller family only
transfers eight bits of data during each serial transfer
APPLICATIONS INFORMATION
Ground Plane Management and Layout
Even though the TS7001’s exhibits excellent supply
rejection as shown in th Typical Operating
Characteristics, it is always considered good
engineering practice to prevent high-frequency noise
on the TS7001’s VDD power supply from affecting
the ADC’s high-speed comparator. Therefore, the
VDD supply pin should be bypassed to the star
ground with 0.1μF and 10μF capacitors in parallel
and placed close to the ADC’s Pin 2 as was shown
in Figure 4. Component lead lengths should be very
short for optimal supply-noise rejection. If the power
supply is very noisy, an optional 10-Ω resistor
inserted in series with the TS7001’s VDD pin can be
used in conjunction with the bypass capacitors to
form a low-pass filter.
For best performance, printed circuit boards should
always be used and wire-wrap boards are not
recommended. Good PC board layout techniques
ensure that digital and analog signal lines are kept
separate from each other, analog and digital
(especially clock) lines are not routed parallel to one
another, and high-speed digital lines are not routed
underneath the ADC package.
A contiguous analog ground plane should be routed
under the TS7001 to avoid digital noise coupling. A
single-point analog ground (star ground point)
should be created at the ADC’s GND and separate
from any digital logic ground. All analog grounds as
well as the ADC’s GND pin should be connected to
the star ground. No other digital system ground
should be made to this ground connection. For
lowest-noise operation, the ground return to the star
ground’s power supply should be low impedance
and as short as possible.
Evaluating the TS7001’s Dynamic Performance
The recommended layout for the TS7001 is outlined
in the demo board manual for the TS7001. The
demo board kit includes a fully assembled/tested
demo board and documentation describing how to
evaluate the TS7001’s dynamic performance using
Touchstone Semiconductor’s proprietary TSDA-VB
data acquisition/capture kit.
TS7001DS r1p0
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RTFDS
TOUCHSTONE [ TOUCHSTONE SEMICONDUCTOR INC ]
