TS7001
Figure 11: TS7001’s Power Management Mode 3 Operation Diagram for Slow-SCLK Microcontrollers.
Figure 12: TS7001’s Power Management Mode 3 Operation Diagram for Fast-SCLK Microcontrollers and DSPs.
In microcontroller applications (or in systems with a
slow serial clock), the system timing design can be
devised to accommodate this timing alignment by
into PM Mode 3 where the power-down operation is
enabled when the conversion sequence terminates.
Power Management Mode 4 Operation:
[PM1,PM0] = [1,1]
assigning the CS signal to one of the port lines and
then adjusting the timing such that the serial data
read (from the microcontroller’s serial port) is not
initiated for at least 5μs.
In PM Mode 4, the TS7001 is automatically placed in
standby (or sleep) mode at the end of every
conversion. In this mode, all internal circuitry is
powered down except for the internal 2.5-V
reference. PM Mode 4 is similar to PM Mode 3; in
this case, the power-up delay time is much shorter
(1μs vs 5μs) because the internal reference remains
powered up at all times.
However, in systems with higher speed serial clocks
(not
unlike
high-speed
serial-clock
DSP
applications), it may not be possible to insert a 5μs
delay between ADC power up and the first low-to-
high SCLK transition. Therefore, system timing
design should incorporate a WRITE to the TS7001’s
control register to terminate the ADC’s PM Mode 3
operation and program the TS7001 into PM Mode 2;
that is, by writing [PM1,PM0] = [0,1] into the
TS7001’s control register. To get a valid conversion
result, a second conversion must be initiated when
Figure 13 shows the general operating diagram of
the TS7001 in PM Mode 4. On the first high-to-low
SCLK transition after the CS pin is toggled low, the
TS7001 is powered up out of its standby mode.
Since the TS7001’s power-up delay time PM Mode 4
is very short, powering up the ADC and executing a
conversion with valid results in the same read/write
operation is feasible. The analog input signal is
the
ADC
is
powered
up
–
see
Figure 19. A WRITE operation that takes place with
this second conversion can program the ADC back
TS7001DS r1p0
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RTFDS
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