TPS929160-Q1
ZHCSNG0 – APRIL 2023
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表 7-91. IOUTH1 Register Field Descriptions
Bit
7-6
5-0
Field
Type
Reset
Description
RESERVED
IOUTH1
R
0h
Reserved
R/W
X
Output current setting for OUTH1
Load EEPROM register data when reset
7.6.2.17 IOUTAR Register (Offset = 60h) [Reset = 00h]
IOUTAR is shown in 图 7-90 and described in 表 7-92.
Return to the Summary Table.
图 7-90. IOUTAR Register
7
6
5
4
3
2
1
1
1
0
RESERVED
R-0h
表 7-92. IOUTAR Register Field Descriptions
Bit
7-0
Field
RESERVED
Type
Reset
Description
R
0h
Reserved
7.6.2.18 IOUTBR Register (Offset = 61h) [Reset = 00h]
IOUTBR is shown in 图 7-91 and described in 表 7-93.
Return to the Summary Table.
图 7-91. IOUTBR Register
7
6
5
4
3
2
0
RESERVED
R-0h
表 7-93. IOUTBR Register Field Descriptions
Bit
7-0
Field
RESERVED
Type
Reset
Description
R
0h
Reserved
7.6.2.19 IOUTCR Register (Offset = 62h) [Reset = 00h]
IOUTCR is shown in 图 7-92 and described in 表 7-94.
Return to the Summary Table.
图 7-92. IOUTCR Register
7
6
5
4
3
2
0
RESERVED
R-0h
表 7-94. IOUTCR Register Field Descriptions
Bit
7-0
Field
RESERVED
Type
Reset
Description
R
0h
Reserved
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English Data Sheet: SLVSG60
84
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