TPS929160-Q1
ZHCSNG0 – APRIL 2023
www.ti.com.cn
表 7-71. OUTEN2 Register Field Descriptions
Bit
7-6
5
Field
Type
Reset
Description
RESERVED
ENOUTF1
R
0h
Reserved
R/W
0h
Enable register for OUTF1
0h = Disabled
1h = Enabled
4
ENOUTF0
R/W
0h
Enable register for OUTF0
0h = Disabled
1h = Enabled
3-2
1
RESERVED
ENOUTE1
R
0h
0h
Reserved
R/W
Enable register for OUTE1
0h = Disabled
1h = Enabled
0
ENOUTE0
R/W
0h
Enable register for OUTE0
0h = Disabled
1h = Enabled
7.6.1.52 OUTEN3 Register (Offset = 43h) [Reset = 00h]
OUTEN3 is shown in 图 7-72 and described in 表 7-72.
Return to the Summary Table.
图 7-72. OUTEN3 Register
7
6
5
4
3
2
1
0
RESERVED
R-0h
ENOUTH1
R/W-0h
ENOUTH0
R/W-0h
RESERVED
R-0h
ENOUTG1
R/W-0h
ENOUTG0
R/W-0h
表 7-72. OUTEN3 Register Field Descriptions
Bit
Field
Type
Reset
Description
7-6
5
RESERVED
ENOUTH1
R
0h
Reserved
R/W
0h
Enable register for OUTH1
0h = Disabled
1h = Enabled
4
ENOUTH0
R/W
0h
Enable register for OUTH0
0h = Disabled
1h = Enabled
3-2
1
RESERVED
ENOUTG1
R
0h
0h
Reserved
R/W
Enable register for OUTG1
0h = Disabled
1h = Enabled
0
ENOUTG0
R/W
0h
Enable register for OUTG0
0h = Disabled
1h = Enabled
7.6.1.53 PWMSHARE Register (Offset = 44h) [Reset = 00h]
PWMSHARE is shown in 图 7-73 and described in 表 7-73.
Return to the Summary Table.
图 7-73. PWMSHARE Register
7
6
5
4
3
2
1
0
RESERVED
R-0h
SHAREPWM
R/W-0h
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SLVSG60
76
Submit Document Feedback
Product Folder Links: TPS929160-Q1
TI [ TEXAS INSTRUMENTS ]
