TPS929160-Q1
ZHCSNG0 – APRIL 2023
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表 7-131. LOCK Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
0
IOUTLOCK
R/W
1h
IOUT register lock
0h = Write protection is disabled
1h = Write protection is enabled
7.6.4.5 CLRREG Register (Offset = 94h) [Reset = 00h]
CLRREG is shown in 图 7-126 and described in 表 7-132.
Return to the Summary Table.
图 7-126. CLRREG Register
7
6
5
4
3
2
1
0
RESERVED
R-0h
SOFTRESET
R/W-0h
EEPLOAD
R/W-0h
REGDEFAULT
R/W-0h
表 7-132. CLRREG Register Field Descriptions
Bit
Field
Type
Reset
Description
7-3
2
RESERVED
SOFTRESET
R
0h
Reserved
R/W
0h
Write 1 to reset all state machine and all registers, automatically
returns to 0
1
0
EEPLOAD
R/W
R/W
0h
0h
Write 1 to load EEP data to corresponding registers, automatically
returns to 0
REGDEFAULT
Write 1 to set all registers to default value, automatically returns to 0
7.6.4.6 NSTB Register (Offset = 95h) [Reset = 00h]
NSTB is shown in 图 7-127 and described in 表 7-133.
Return to the Summary Table.
图 7-127. NSTB Register
7
6
5
4
3
2
1
0
RESERVED
R-0h
NSTB
R/W-0h
表 7-133. NSTB Register Field Descriptions
Bit
Field
Type
Reset
Description
7-1
0
RESERVED
NSTB
R
0h
Reserved
R/W
0h
NSTB output internal pulling up control register
0h = Pulling up is enabled
1h = Pulling up is disabled
7.6.4.7 CTRLGATE Register (Offset = 96h) [Reset = 00h]
CTRLGATE is shown in 图 7-128 and described in 表 7-134.
Return to the Summary Table.
图 7-128. CTRLGATE Register
7
6
5
4
3
2
1
0
CTRLGATE
R/W-0h
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English Data Sheet: SLVSG60
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