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TMS320TCI6487 参数 Datasheet PDF下载

TMS320TCI6487图片预览
型号: TMS320TCI6487
PDF下载: 下载PDF文件 查看货源
内容描述: 通信基础设施数字信号处理器 [Communications Infrastructure Digital Signal Processor]
分类和应用: 数字信号处理器通信
文件页数/大小: 206 页 / 2183 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320TCI6487  
TMS320TCI6488  
Communications Infrastructure Digital Signal Processor  
www.ti.com  
SPRS358FAPRIL 2007REVISED AUGUST 2008  
8.2 Recommended Clock and Control Signal Transition Behavior  
All clocks and control signals must transition between VIH and VIL (or between VIL and VIH) in a monotonic  
manner.  
8.3 Power Supplies  
8.3.1 Power-Supply Sequencing  
Power supply sequencing must be followed as seen in Figure 8-4.  
Table 8-1. Timing Requirements for Power Supply Ramping  
(see Figure 8-4)  
NO.  
PARAMETERS  
MIN  
MAX UNIT  
3
tsu(DVDD18-DVDD11)  
th(DVDD11-POR)  
Setup Time, DVDD18 and VREFSSTL supply stable before  
DVDD11 and CVDD11 supplies stable.  
0.5  
200  
ms  
4
Hold time, POR low after CVDD11 and DVDD11 supplies stable  
100  
µs  
DVDD18  
VREFSSTL (DDR2)  
3
CVDD11  
DVDD11  
4
PORz  
Figure 8-4. Power-Supply Timing  
8.3.2 Power-Supply Decoupling  
In order to properly decouple the supply planes from system noise, place as many capacitors (caps) as  
possible close to the DSP. These caps need to be close to the DSP, no more than 1.25 cm maximum  
distance to be effective. Physically smaller caps are better, such as 0402, but need to be evaluated from a  
yield/manufacturing point-of-view. Parasitic inductance limits the effectiveness of the decoupling  
capacitors, therefore physically smaller capacitors should be used while maintaining the largest available  
capacitance value. As with the selection of any component, verification of capacitor availability over the  
product's production lifetime should be considered.  
8.3.3 Power-Down Operation  
One of the power goals for the TCI6487/8 is to reduce power dissipation due to unused peripherals. There  
are different ways to power down peripherals on the TCI6487/8 device.  
Some peripherals can be statically powered down at device reset through the device configuration pins  
(see Section 3.1, Device Configuration at Device Reset). Once in a static power-down state, the peripheral  
is held in reset and its clock is turned off. Peripherals cannot be enabled once they are in a static  
power-down state. To take a peripheral out of the static power-down state, a device reset must be  
executed with a different configuration pin setting.  
Submit Documentation Feedback  
Peripheral Information and Electrical Specifications  
77  
 
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