TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
SPRS358F–APRIL 2007–REVISED AUGUST 2008
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8 Peripheral Information and Electrical Specifications
8.1 Parameter Information
Data Sheet Timing
Reference Point
Tester Pin Electronics
42 W
3.5 nH
Output
Under
Test
Transmission Line
(A)
Z0 = 50 W
Device Pin(A)
A. The data sheet provides timing at the device pin. For output timing analysis, the tester pin electronics and its
transmission line effects must be taken into account. A transmission line with a delay of 2 ns can be used to produce
the desired transmission line effect. The transmission line is intended as a load only. It is not necessary to add or
subtract the transmission line delay (2 ns) from the data sheet timings. Input requirements in the data sheet are tested
with an input slow rate of < 4 Volts per nanosecond (4 V/ns) at the device pin.
Figure 8-1. Test Load Circuit for AC Timing Measurements
The load capacitance value stated is only for characterization and measurement of AC timing signals. This
load capacitance value does not indicate the maximum load the device is capable of driving.
8.1.1 1.8 V Signal Transition Levels
All input and output timing parameters are referenced to 0.9 V for both "0" and "1" logic levels.
Vref = 0.9 V
Figure 8-2. Input and Output Voltage Reference Levels for AC Timing Measurements
All rise and fall transition timing parameters are reference to VIL MAX and VIH MIN for input clocks.
Vref = VIHMIN (or VOHMIN)
Vref = VILMAX (or VOLMAX)
Figure 8-3. Rise and Fall Transition Time Voltage Reference Levels
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Peripheral Information and Electrical Specifications
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