TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
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SPRS358F–APRIL 2007–REVISED AUGUST 2008
8.4 Enhanced Direct Memory Access (EDMA3) Controller
The primary purpose of the EDMA3 is to service user-programmed data transfers between two
memory-mapped slave endpoints on the device. The EDMA3 services software-driven paging transfers
(e.g., data movement between external memory and internal memory), performs sorting or subframe
extraction of various data structures, services event driven peripherals such as a McBSP port, and
offloads data transfers from the device CPU.
The EDMA3 includes the following features:
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Fully orthogonal transfer description
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3 transfer dimensions: array (multiple bytes), frame (multiple arrays), and block (multiple frames)
Single event can trigger transfer of array, frame, or entire block
Independent indexes on source and destination
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Flexible transfer definition:
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Increment or FIFO transfer addressing modes
Linking mechanism allows for ping-pong buffering, circular buffering, and repetitive/continuous
transfers, all with no CPU intervention
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Chaining allows multiple transfers to execute with one event
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256 PaRAM entries
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Used to define transfer context for channels
Each PaRAM entry can be used as a DMA entry, QDMA entry, or link entry
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64 DMA channels
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Manually triggered (CPU writes to channel controller register), external event triggered, and chain
triggered (completion of one transfer triggers another)
8 Quick DMA (QDMA) channels
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Used for software-driven transfers
Triggered upon writing to a single PaRAM set entry
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6 transfer controllers and 6 event queues with programmable system-level priority
Interrupt generation for transfer completion and error conditions
Debug visibility
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Queue watermarking/threshold allows detection of maximum usage of event queues
Error and status recording to facilitate debug
Each of the transfer controllers has a direct connection to the switched central resource (SCR). Table 4-1
lists the peripherals that can be accessed by the transfer controllers.
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Peripheral Information and Electrical Specifications
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