TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
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SPRS358F–APRIL 2007–REVISED AUGUST 2008
Table 3-4. Device Configuration Status Register Field Descriptions (continued)
Bit
Field
Value Description
1
L2CFG
L2 Configuration. Determines the allocation of L2 memory to each core.
0
1
Asymmetric – 1.5 M/1.0 M/0.5 M
Symmetric – 1.0 M/1.0 M/1.0 M
0
LENDIAN
Device Endian mode. Shows the status of whether the system is operating in Big Endian mode or
Little Endian mode.
0
1
Big Endian mode
Little Endian mode
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Device Configuration
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