TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
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SPRS358F–APRIL 2007–REVISED AUGUST 2008
implementation instructions for the three serializer/deserializer (SERDES) based interfaces
on the TMS320TCI6488 DSP device. These include the Serial RapidIO (SRIO), antenna,
and serial gigabit media independent interface (SGMII) interfaces.
SPRAAN6 TMS320TCI6487/8 Module Throughput. This document provides information on the
TMS320TCI6487/8 module throughput.
SPRAAS3 TMS320TCI6488 Power Consumption Summary. This document discusses the power
consumption of the Texas Instruments TMS320TCI6488 digital signal processor (DSP).
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Device Overview
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