Functional Overview
3.10 External Reference Oscillator Clock Option
The typical specifications for the external quartz crystal for a frequency of 30 MHz are listed below:
•
•
•
•
•
Fundamental mode, parallel resonant
C (load capacitance) = 12 pF
L
C
= C = 24 pF
L2
L1
C
= 6 pF
shunt
ESR range = 25 to 40 Ω
3.11 Watchdog Block
The watchdog block on the F281x and C281x is identical to the one used on the 240x devices. The watchdog
module generates an output pulse, 512 oscillator clocks wide (OSCCLK), whenever the 8-bit watchdog up
counter has reached its maximum value. To prevent this, the user disables the counter or the software must
periodically write a 0x55 + 0xAA sequence into the watchdog key register which will reset the watchdog
counter. Figure 3−11 shows the various functional blocks within the watchdog module.
WDCR (WDPS(2:0))
WDCR (WDDIS)
WDCNTR(7:0)
OSCCLK
WDCLK
8-Bit
Watchdog
Counter
CLR
Watchdog
Prescaler
/512
Clear Counter
Internal
Pullup
WDKEY(7:0)
WDRST
WDINT
Generate
Output Pulse
(512 OSCCLKs)
Bad Key
Watchdog
55 + AA
Key Detector
Good Key
XRS
Bad
WDCHK
Key
Core-reset
SCSR (WDENINT)
WDCR (WDCHK(2:0))
1
0
1
WDRST
(See Note A)
NOTE A: The WDRST signal is driven low for 512 OSCCLK cycles.
Figure 3−11. Watchdog Module
The WDINT signal enables the watchdog to be used as a wakeup from IDLE/STANDBY mode timer.
In STANDBY mode, all peripherals are turned off on the device. The only peripheral that remains functional
is the watchdog. The WATCHDOG module will run off the PLL clock or the oscillator clock. The WDINT signal
is fed to the LPM block so that it can wake the device from STANDBY (if enabled). See Section 3.12,
Low-Power Modes Block, for more details.
54
SPRS174L
April 2001 − Revised December 2004
TI [ TEXAS INSTRUMENTS ]
