TMS320DM6437
Digital Media Processor
www.ti.com
SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Table 6-57. Switching Characteristics for Host-Port Interface Cycles
(see Figure 6-32 through Figure 6-35) (continued)
-400
-500
-600
NO.
PARAMETER
UNIT
MIN
MAX
Applies to HAS used. The conditions
under which HRDY goes high (not
Delay time, HAS low to HRDY
19
td(HASL-HRDYV)
ready) or stays low (ready) for HPI
valid
12
ns
Write or HPI Read is the same as
parameter #5.
HCS
HAS
2
2
1
1
1
1
1
1
HCNTL[1:0]
HR/W
2
2
2
2
HHWIL
4
3
3
(A)(C)
HSTROBE
15
6
15
14
14
8
6
8
HD[15:0]
(output)
13
7
1st Half-Word
2nd Half-Word
5
(B)
HRDY
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with
auto-incrementing)and the state of the FIFO, transitions on HRDY may or may not occur.
For more detailed information on the HPI peripheral, see the TMS320DM643x Host Port Interface (HPI) User’s Guide
(literaturenumber SPRU998).
C. HCS reflects typical HCS behavior when HSTROBE assertion is caused by HDS1 or HDS2. HCS timing requirements are
reflected by parameters for HSTROBE.
Figure 6-32. HPI16 Read Timing (HAS Not Used, Tied High)
Submit Documentation Feedback
Peripheral Information and Electrical Specifications
247
TI [ TEXAS INSTRUMENTS ]
