TMS320DM6437
Digital Media Processor
www.ti.com
SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Table 3-52. EMIFA/VPSS Sub-Block 1 Configuration Choice C(1)
MAJOR
CONFIG
OPTION
MINOR
CONFIG
OPTION
PINMUX SELECTION FIELDS
RESULTING PERIPHERALS/PINS
VPBE
AEM
OTHERS
EMIFA
GPIO
8-bit EMIFA (Async)
Pinout Mode 3
Cfg Summary
No VENC
17-to-21 GP pins
VENCSEL = 0
-
-
-
0 = GP[31, 29:14]
0 = EM_CS2,
EM_A[4:0],
EM_BA[1:0]
RGBSEL = 0
-
C1
011
CS3SEL = 0,1
CS4SEL = 0,1
CS5SEL = 0,1
1 = EM_CS3
1 = EM_CS4
1 = EM_CS5
-
-
-
0 = GP[13]
0 = GP[32]
0 = GP[33]
1 = VPBECLK, can
be used by DAC
VPBECKEN = 0,1
-
0 = GP[30]
C
8-bit EMIFA (Async)
Pinout Mode 3
Cfg Summary
16-bit VENC
0-to-4 GP pins
2 = VCLK,
YOUT[7:0],
COUT[7:0]
VENCSEL = 2
-
-
-
0 = EM_CS2,
EM_A[4:0],
EM_BA[1:0]
C2
011
RGBSEL = 0
-
CS3SEL = 0,1,2
CS4SEL = 0,1,2
CS5SEL = 0,1,2
VPBECKEN = 0,1
1 = EM_CS3
1 = EM_CS4
1 = EM_CS5
-
2 = LCD_OE
2 = VSYNC
2 = HSYNC
1 = VPBECLK
0 = GP[13]
0 = GP[32]
0 = GP[33]
0 = GP[30]
(1) Italics indicate mandatory setting for a given Minor Configuration option.
148
Device Configurations
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