TMS320DM6437
Digital Media Processor
www.ti.com
SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Table 3-53. EMIFA/VPSS Sub-Block 1 Configuration Choice D(1)
MAJOR
CONFIG
OPTION
MINOR
CONFIG
OPTION
PINMUX SELECTION FIELDS
RESULTING PERIPHERALS/PINS
VPBE
AEM
OTHERS
EMIFA
GPIO
8-bit EMIFA (NAND)
Pinout Mode 4
Cfg Summary
No VENC
22-to-26 GP pins
0 = GP[31, 29:14]
0 = GP[11:10, 7:5]
VENCSEL = 0
-
-
-
0 = EM_A[2:1],
EM_CS2
RGBSEL = 0
D1
100
CS3SEL = 0,1
CS4SEL = 0,1
CS5SEL = 0,1
1 = EM_CS3
1 = EM_CS4
1 = EM_CS5
-
-
-
0 = GP[13]
0 = GP[32]
0 = GP[33]
1 = VPBECLK,
can be used by
DAC
VPBECKEN = 0,1
-
0 = GP[30]
8-bit EMIFA (NAND)
Pinout Mode 4
Cfg Summary
8-bit VENC
12-to-17 GP pins
1 = VCLK,
YOUT[7:0]
VENCSEL = 1
-
1 = GP[21:14]
0 = EM_A[2:1],
EM_CS2
1 = EM_A[2:1],
EM_CS2
0 = none
1 = LCD_FIELD
0 = GP[11:10, 7:5]
1 = GP[10, 7:5]
RGBSEL = 0,1
D2
100
CS3SEL = 0,1,2
CS4SEL = 0,1,2
CS5SEL = 0,1,2
VPBECKEN = 0,1
1 = EM_CS3
1 = EM_CS4
1 = EM_CS5
-
2 = LCD_OE
2 = VSYNC
2 = HSYNC
1 = VPBECLK
0 = GP[13]
0 = GP[32]
0 = GP[33]
0 = GP[30]
D
8-bit EMIFA (NAND)
Pinout Mode 4
16-to-18-bit
VENC
Cfg Summary
2-to-9 GP pins
2 = VCLK,
YOUT[7:0],
COUT[7:0]
VENCSEL = 2
-
-
0 = EM_A[2:1],
EM_CS2
1 = EM_A[2:1],
EM_CS2
2 = EM_A[2:1],
EM_CS2
3 = EM_A[2:1],
EM_CS2
0 = none
0 = GP[11:10, 7:5]
1 = GP[10, 7:5]
2 = GP[11:10, 7]
3 = GP[10, 7]
1 = LCD_FIELD
2 = R2, B2
3 = R2, B2,
LCD_FIELD
D3
100
RGBSEL = 0,1,2,3
CS3SEL = 0,1,2
CS4SEL = 0,1,2
CS5SEL = 0,1,2
VPBECKEN = 0,1
1 = EM_CS3
1 = EM_CS4
1 = EM_CS5
-
2 = LCD_OE
2 = VSYNC
2 = HSYNC
1 = VPBECLK
0 = GP[13]
0 = GP[32]
0 = GP[33]
0 = GP[30]
(1) Italics indicate mandatory setting for a given Minor Configuration option.
Submit Documentation Feedback
Device Configurations
149
TI [ TEXAS INSTRUMENTS ]
