TMS320DM6437
Digital Media Processor
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SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Table 3-51. EMIFA/VPSS Sub-Block 1 Configuration Choice B(1)
MAJOR
CONFIG
OPTION
MINOR
CONFIG
OPTION
PINMUX SELECTION FIELDS
RESULTING PERIPHERALS/PINS
VPBE
AEM
OTHERS
EMIFA
GPIO
8-bit EMIFA (Async)
Pinout Mode 1
Cfg Summary
No VENC
9-to-13 GP pins
VENCSEL = 0
0 = EM_D[7:0]
-
-
0 = GP[31, 29:22]
0 = EM_CS2,
EM_A[4:0],
EM_BA[1:0]
RGBSEL = 0
-
B1
001
CS3SEL = 0,1
CS4SEL = 0,1
CS5SEL = 0,1
1 = EM_CS3
1 = EM_CS4
1 = EM_CS5
-
-
-
0 = GP[13]
0 = GP[32]
0 = GP[33]
1 = VPBECLK, can
be used by DAC
VPBECKEN = 0,1
Cfg Summary
VENCSEL = 1
-
0 = GP[30]
B
8-bit EMIFA (Async)
Pinout Mode 1
8-bit VENC
0-to-4 GP pins
1 = VCLK,
YOUT[7:0]
1 = EM_D[7:0]
-
0 = EM_CS2,
EM_A[4:0],
EM_BA[1:0]
RGBSEL = 0
-
-
B2
001
CS3SEL = 0,1,2
CS4SEL = 0,1,2
CS5SEL = 0,1,2
VPBECKEN = 0,1
1 = EM_CS3
1 = EM_CS4
1 = EM_CS5
-
2 = LCD_OE
2 = VSYNC
2 = HSYNC
1 = VPBECLK
0 = GP[13]
0 = GP[32]
0 = GP[33]
0 = GP[30]
(1) Italics indicate mandatory setting for a given Minor Configuration option.
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Device Configurations
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