TMS320DM6437
Digital Media Processor
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SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Table 3-50. EMIFA/VPSS Sub-Block 1 Configuration Choices A and F(1)
MAJOR
CONFIG
OPTION
MINOR
CONFIG
OPTION
PINMUX SELECTION FIELDS
RESULTING PERIPHERALS/PINS
VPBE
AEM
OTHERS
EMIFA
No EMIFA
GPIO
Cfg Summary
No VENC
29 GP pins
0 = GP[31, 29:14]
0 = GP[12:5]
0 = GP[13]
VENCSEL = 0
RGBSEL = 0
CS3SEL = 0
CS4SEL = 0
CS5SEL = 0
VPBECKEN = 0
Cfg Summary
A1, F1
000
-
-
0 = GP[32]
0 = GP[33]
0 = GP[30]
No EMIFA
8-bit VENC
8 to 29 GP pins
1 = VCLK,
YOUT[7:0]
VENCSEL = 1
1 = GP[21:14]
0 = GP[12:5]
1 = GP[12],
GP[10:5]
0 = none
1 = LCD_FIELD
RGBSEL = 0,1
A2, F2
000
-
CS3SEL = 0,2
CS4SEL = 0,2
CS5SEL = 0,2
VPBECKEN = 0,1
Cfg Summary
2 = LCD_OE
2 = VSYNC
0 = GP[13]
0 = GP[32]
A, F
2 = HSYNC
0 = GP[33]
1 = VPBECLK
16-to-24-bit VENC
0 = GP[30]
No EMIFA
0 to 12 GP pins
2 = VCLK,
YOUT[7:0],
COUT[7:0]
VENCSEL = 2
-
0 = none
0 = GP[12:5]
1 = GP[12],
GP[10:5]
2 = GP[12:7]
3 = GP[12],
1 = LCD_FIELD
2 = R2, B2
3 = R2, B2,
LCD_FIELD
RGBSEL = 0,1,2,3,4
A3, F3
000
-
4 = G0, B0, R0, G1, GP[10:7]
B1, R1, R2, B2
2 = LCD_OE
2 = VSYNC
4 = No GP
0 = GP[13]
0 = GP[32]
0 = GP[33]
0 = GP[30]
CS3SEL = 0,2
CS4SEL = 0,2
CS5SEL = 0,2
VPBECKEN = 0,1
2 = HSYNC
1 = VPBECLK
(1) Italics indicate mandatory settings for a given Minor Configuration option.
146
Device Configurations
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