TMS320DM6437
Digital Media Processor
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SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Table 3-45. EMIFA/VPSS Sub-Block 0 Configuration Choice C(1)
MAJOR
MINOR
PINMUX SELECTION FIELDS
RESULTING PERIPHERALS/PINS
CONFIG CONFIG
OPTION OPTION
PCIEN
AEM
AEAW
OTHERS
PCI
EMIFA
VPFE
# GPIO PINS
12 GP pins
8-bit EMIFA
(Async) Pinout
mode 3
Config Summary
No PCI
No CCDC
0 = GP[54,
43:36]
CCDCSEL = 0
-
HVDSEL = 0
CWENSEL = 0
CFLDSEL = 0
CI10SEL = 0
CI32SEL = 0
CI54SEL = 0
CI76SEL = 0
-
0 = GP[53:52]
C1
0
011
000
0 = EM_R/W
-
-
0 = GP[34]
-
-
0 = EM_D[6:7]
0 = EM_D[4:5]
0 = EM_D[2:3]
0 = EM_D[0:1]
-
-
-
-
C
8-bit EMIFA
(Async) Pinout
mode 3
Config Summary
No PCI
8-bit CCDC
0-to-3 GP pins
1 = PCLK,
YI[7:0]
CCDCSEL = 1
-
-
HVDSEL = 0,1
CWENSEL = 0
CFLDSEL = 0
CI10SEL = 0
CI31SEL = 0
CI54SEL = 0
CI76SEL = 0
-
1 = VD, HD
0 = GP[53:52]
C2
0
011
000
0 = EM_R/W
-
-
-
1 = C_FIELD
0 = GP[34]
-
0 = EM_D[6:7]
0 = EM_D[4:5]
0 = EM_D[2:3]
0 = EM_D[0:1]
-
-
-
-
-
-
-
-
(1) Italics indicate mandatory settings for a given Minor Configuration option.
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Device Configurations
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