TMS320DM6437
Digital Media Processor
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SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Table 3-44. EMIFA/VPSS Sub-Block 0 Configuration Choice B (continued)
MAJOR
MINOR
PINMUX SELECTION FIELDS
RESULTING PERIPHERALS/PINS
CONFIG CONFIG
OPTION OPTION
PCIEN
AEM
AEAW
OTHERS
PCI
EMIFA
VPFE
# GPIO PINS
8-bit EMIFA
(Async) Pinout
mode 1 w/
Config Summary
No PCI
8-bit CCDC
0-to-2 GP pins
EM_A[21:0]
1 = PCLK,
YI[7:0]
CCDCSEL = 1
-
-
HVDSEL = 0,1
CWENSEL = 0
CFLDSEL = 0,1
-
1 = VD, HD
-
0 = GP[53:52]
0 = EM_R/W
0 = EM_A21
-
-
B
B6
0
001
100
1 = C_FIELD
0 =
CI10SEL = 0
CI32SEL = 0
CI54SEL = 0
CI76SEL = 0
-
-
-
-
-
-
-
-
-
EM_A[19:20]
0 =
EM_A[17:18]
0 =
EM_A[15:16]
0 =
EM_A[13:14]
138
Device Configurations
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