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TMS320C6678XCYP25 参数 Datasheet PDF下载

TMS320C6678XCYP25图片预览
型号: TMS320C6678XCYP25
PDF下载: 下载PDF文件 查看货源
内容描述: 多核固定和浮点数字信号处理器 [Multicore Fixed and Floating-Point Digital Signal Processor]
分类和应用: 数字信号处理器
文件页数/大小: 242 页 / 2088 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320C6678  
Multicore Fixed and Floating-Point Digital Signal Processor  
SPRS691D—April 2013  
www.ti.com  
2.5.3.3 Ethernet Boot Parameter Table  
Table 2-18  
Ethernet Boot Mode Parameter Table (Part 1 of 2)  
Byte  
Offset  
Configured Through Boot  
Configuration Pins  
Name  
Description  
12  
Options  
Bits 2-0 Interface  
101b = SGMII  
-
Others = Reserved  
Bit 3 Half or Full duplex  
0 = Half Duplex  
1 = Full Duplex  
Bit 4 Skip TX  
0 = Send Ethernet Ready Frame every 3 seconds  
1 = Don't send Ethernet Ready Frame  
Bits 6-5 Initialize Config  
00b = Switch, SerDes, SGMII and PASS are configured  
01b = Only SGMII and PASS are configured  
10b= Reserved  
11b = None of the Ethernet system is configured.  
Bits 15-7 Reserved  
14  
16  
18  
20  
22  
24  
26  
MAC High  
The 16 MSBs of the MAC address to receive during boot  
The 16 middle bits of the MAC address to receive during boot  
The 16 LSBs of the MAC address to receive during boot  
The 16 MSBs of the multi-cast MAC address to receive during boot  
The 16 middle bits of the multi-cast MAC address to receive during boot  
The 16 LSBs of the multi-cast MAC address to receive during boot  
The source UDP port to accept boot packets from.  
A value of 0 will accept packets from any UDP port  
The destination port to accept boot packets on.  
-
-
-
-
-
-
-
MAC Med  
MAC Low  
Multi MAC High  
Multi MAC Med  
Multi MAC Low  
Source Port  
28  
30  
Dest Port  
-
-
Device ID 12  
The first two bytes of the device ID.  
This is typically a string value, and is sent in the Ethernet ready frame  
The 2nd two bytes of the device ID.  
32  
34  
Device ID 34  
-
-
Dest MAC High  
The 16 MSBs of the MAC destination address used  
for the Ethernet ready frame. Default is broadcast.  
36  
38  
40  
Dest MAC Med  
Dest MAC Low  
SGMII Config  
The 16 middle bits of the MAC destination address  
The 16 LSBs of the MAC destination address  
Bits 3-0 are the config index  
-
-
-
Bit 4 set if direct config used  
Bit 5 set if no configuration done  
Bits 15-6 Reserved  
42  
44  
46  
48  
50  
52  
54  
56  
SGMII Control  
The SGMII control register value  
-
-
-
-
-
-
-
-
SGMII Adv Ability  
SGMII TX Cfg High  
SGMII TX Cfg Low  
SGMII RX Cfg High  
SGMII RX Cfg Low  
SGMII Aux Cfg High  
SGMII Aux Cfg Low  
The SGMII ADV Ability register value  
The 16 MSBs of the SGMII Tx config register  
The 16 LSBs of the SGMII Tx config register  
The 16 MSBs of the SGMII Rx config register  
The 16 LSBs of the SGMII Rx config register  
The 16 MSBs of the SGMII Aux config register  
The 16 LSBs of the SGMII Aux config register  
36  
Device Overview  
Copyright 2013 Texas Instruments Incorporated  
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