TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
Table 7-54
MPU2 Registers (Part 2 of 2)
Offset
278h
280h
284h
288h
290h
294h
298h
2A0h
2A4h
2A8h
2B0h
2B4h
2B8h
2C0h
2C4h
2C8h
2D0h
2D4h
2Dh
Name
Description
PROG7_MPPA
PROG8_MPSAR
PROG8_MPEAR
PROG8_MPPA
PROG9_MPSAR
PROG9_MPEAR
PROG9_MPPA
PROG10_MPSAR
PROG10_MPEAR
PROG10_MPPA
PROG11_MPSAR
PROG11_MPEAR
PROG11_MPPA
PROG12_MPSAR
PROG12_MPEAR
PROG12_MPPA
PROG13_MPSAR
PROG13_MPEAR
PROG13_MPPA
PROG14_MPSAR
PROG14_MPEAR
PROG14_MPPA
PROG15_MPSAR
PROG15_MPEAR
PROG15_MPPA
FLTADDRR
Programmable range 7, memory page protection attributes
Programmable range 8, start address
Programmable range 8, end address
Programmable range 8, memory page protection attributes
Programmable range 9, start address
Programmable range 9, end address
Programmable range 9, memory page protection attributes
Programmable range 10, start address
Programmable range 10, end address
Programmable range 10, memory page protection attributes
Programmable range 11, start address
Programmable range 11, end address
Programmable range 11, memory page protection attributes
Programmable range 12, start address
Programmable range 12, end address
Programmable range 12, memory page protection attributes
Programmable range 13, start address
Programmable range 13, end address
Programmable range 13, memory page protection attributes
Programmable range 14, start address
Programmable range 14, end address
Programmable range 14, memory page protection attributes
Programmable range 15, start address
Programmable range 15, end address
Programmable range 15, memory page protection attributes
Fault address
2E0h
2E4h
2E8h
2F0h
2F4h
2F8h
300h
304h
308h
FLTSTAT
Fault status
FLTCLR
Fault clear
End of Table 7-54
Table 7-55
MPU3 Registers (Part 1 of 2)
Offset
0h
Name
Description
REVID
Revision ID
4h
CONFIG
Configuration
10h
IRAWSTAT
IENSTAT
Interrupt raw status/set
Interrupt enable status/clear
Interrupt enable
14h
18h
IENSET
1Ch
20h
IENCLR
Interrupt enable clear
EOI
End of interrupt
200h
204h
208h
300h
PROG0_MPSAR
PROG0_MPEAR
PROG0_MPPA
FLTADDRR
Programmable range 0, start address
Programmable range 0, end address
Programmable range 0, memory page protection attributes
Fault address
184
Peripheral Information and Electrical Specifications
Copyright 2012 Texas Instruments Incorporated