TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
Table 7-51
Master ID Settings (Part 2 of 2) (1)
Master ID
Master
28
EDMA2_TC0 read
EDMA2_TC0 write
EDMA2_TC1 read
EDMA2_TC1 write
EDMA2_TC2 read
EDMA2_TC2 write
EDMA2_TC3 read
EDMA2_TC3 write
Reserved
29
30
31
32
33
34
35
36 - 37
38 - 39
40 - 47
48
SRIO_PKTDMA
Reserved
DAP
49
EDMA3CC0
50
EDMA3CC1
51
EDMA3CC2
52
MSMC (2)
53
PCIe
54
SRIO_Master
HyperLink
55
56 - 59
60 - 85
86
Network coprocessor packet DMA
Reserved
TSIP0
87
TSIP1
88 - 91
92 - 93
94 - 127
128
QM_PKTDMA
QM_second
Reserved
Tracer_core_0 (3)
Tracer_core_1
Reserved
129
130
131
Reserved
132
Reserved
133
Reserved
134
Reserved
135
Reserved
136
Tracer_MSMC0
Tracer_MSMC1
Tracer_MSMC2
Tracer_MSMC3
Tracer_DDR
Tracer_SEM
Tracer_QM_P
Tracer_QM_M
Tracer_CFG
137
138
139
140
141
142
143
144
End of Table 7-51
180
Peripheral Information and Electrical Specifications
Copyright 2012 Texas Instruments Incorporated
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