TM2SN64EPU 2097152 BY 64-BIT
TM4SN64EPU 4194304 BY 64-BIT
SYNCHRONOUS DYNAMIC RAM MODULES
SMMS681 – AUGUST 1997
electrical characteristics over recommended ranges of supply voltage and ambient temperature
(unless otherwise noted) (see Note 3)
TM4SN64EPU
’4SN64EPU-12A ’4SN64EPU-12
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
MIN
MAX
V
V
High-level output voltage
Low-level output voltage
I
I
= – 2 mA
= 2 mA
2.4
2.4
V
V
OH
OH
0.4
20
0.4
20
OL
OL
0 V < V < V
All other pins = 0 V to V
+ 0.3 V,
I
DD
I
I
Input current (leakage)
Output current (leakage)
µA
DD
+0.3 V,
DD
0 V < V < V
Output disabled
O
I
O
20
696
776
20
616
776
µA
mA
mA
Burst length = 1,
CAS latency = 2
CAS latency = 3
t
≥ t MIN
RC RC
I
Operating current
CC1
I
/I = 0 mA, one bank
OH OL
activated (see Note 4)
I
I
I
CKE ≤ V MAX, t = 15 ns (see Note 5)
CK
32
32
32
32
mA
mA
mA
CC2P
CC2PS
CC2N
Precharge standby current in
power-down mode
IL
CKE and CK ≤ V MAX, t
= ∞ (see Note 6)
IL
CK
= 15 ns (see Note 5)
CK
CKE ≥ V MIN, t
480
480
IH
Precharge standby current in
non-power-down mode
CKE ≥ V MIN, CK ≤ V MAX, t
(see Note 6)
= ∞
IH
IL
CK
I
32
32
mA
CC2NS
I
I
I
CKE ≤ V MAX, t
IL
= 15 ns (see Note 5)
128
128
560
128
128
560
mA
mA
mA
CC3P
CC3PS
CC3N
Active standby current in
power-down mode
CK
CKE and CK ≤ V MAX, t
= ∞ (see Note 6)
CK
= 15 ns (see Note 5)
IL
CKE ≥ V MIN, t
IH
CK
Active standby current in
non-power-down mode
CKE ≥ V MIN, CK ≤ V MAX, t
= ∞
IH
IL
CK
I
160
1056
1256
160
896
mA
mA
mA
CC3NS
(see Note 6)
Page burst, I
/I
= 0 mA
OH OL
CAS latency = 2
CAS latency = 3
All banks activated,
= one cycle
I
Burst current
CC4
n
CCD
(see Note 7)
1256
CAS latency = 2
CAS latency = 3
616
696
32
570
696
32
mA
mA
mA
I
I
Auto-refresh current
Self-refresh current
t
≤ t MIN
CC5
RC RC
CKE ≤ V MAX
IL
CC6
NOTES: 3. All specifications apply to the device after power-up initialization. All control and address inputs must be stable and valid.
4. Control, DQ, and address inputs change state twice during t
.
RC
5. Control, DQ, and address inputs change state once every 30 ns.
6. Control, DQ, and address inputs do not change.
7. Control, DQ, and address inputs change once every cycle.
8
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TI [ TEXAS INSTRUMENTS ]
