TLK10002
SLLSE75 –MAY 2011
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HS_ERROR_COUNTER — Address: 0x10 Default: 0xFFFD
BIT(s)
NAME
DESCRIPTION
ACCESS
10.15:0 HS_ERR_COUNT [15:0]
In functional mode, this counter reflects number of invalid code words (including
disparity errors) received by decoder.
COR
In HS test pattern verification mode, this counter reflects error count for the test
pattern selected through B.10:8
When PRBSEN pin is set, this counter reflects error count for selected PRBS
pattern. Counter value cleared to 16’h0000 when read.
LS_LN0_ERROR_COUNTER — Address: 0x11 Default: 0xFFFD
BIT(s)
NAME
DESCRIPTION
ACCESS
11.15:0 LS_LN0_ERR_COUNT [15:0]
Lane 0 Error counter
COR
In functional mode, this counter reflects number of invalid code words (including
disparity errors) received by decoder in lane alignment slave.
In LS test pattern verification mode, this counter reflects error count for the test
pattern selected through B.5:4
Counter value cleared to 16’h0000 when read.
LS_LN1_ERROR_COUNTER — Address: 0x12 Default: 0xFFFD
BIT(s)
NAME
DESCRIPTION
ACCESS
12.15:0 LS_LN1_ERR_COUNT [15:0]
Lane 1 Error counter
COR
In functional mode, this counter reflects number of invalid code words (including
disparity errors) received by decoder in lane alignment slave.
In LS test pattern verification mode, this counter reflects error count for the test
pattern selected through B.5:4
Counter value cleared to 16’h0000 when read.
LS_LN2_ERROR_COUNTER — Address: 0x13 Default: 0xFFFD
BIT(s)
NAME
DESCRIPTION
ACCESS
13.15:0 LS_LN2_ERR_COUNT [15:0]
Lane 2 Error counter
COR
In functional mode, this counter reflects number of invalid code words (including
disparity errors) received by decoder in lane alignment slave.
In LS test pattern verification mode, this counter reflects error count for the test
pattern selected through B.5:4
Counter value cleared to 16’h0000 when read.
LS_LN3_ERROR_COUNTER — Address: 0x14 Default: 0xFFFD
BIT(s)
NAME
DESCRIPTION
ACCESS
14.15:0 LS_LN3_ERR_COUNT [15:0]
Lane 3 Error counter
COR
In functional mode, this counter reflects number of invalid code words (including
disparity errors) received by decoder in lane alignment slave.
In LS test pattern verification mode, this counter reflects error count for the test
pattern selected through B.5:4
Counter value cleared to 16’h0000 when read.
48
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