ꢀ ꢁꢂ ꢃꢄ ꢅꢆ ꢃꢅ
ꢇꢈ ꢉꢈ ꢊꢋꢌ ꢀꢈ ꢉ ꢍꢋꢌ ꢎꢏ ꢐ ꢆꢑ ꢀ ꢀꢐ ꢏ
SOURCED FROM: SGUS014H − FEBRUARY 1991 − REVISED JUNE 2004
serial-port timing parameters (continued)
Unless otherwise indicated, the data-rate timings shown in Figure 23 and Figure 24 are valid for all serial-port
modes, including handshake. See serial-port timing parameter tables.
Timing diagrams shown in Figure 23 and Figure 24 show operations with the serial port global-control register
bits CLKXP = CLKRP = FSXP = FSRP = 0.
Timing diagrams shown in Figure 23 and Figure 24 depend upon the length of the serial-port word, n, where
n = 8, 16, 24, or 32 bits, respectively.
66
65
H1
65
67
67
CLKX/R
69
68
72
79
70
Bit n − 1
71
Bit n − 2
Bit 0
DX
DR
Bit n − 1
Bit n − 2
FSR
74
73
73
FSX (int)
FSX (ext)
75
75
76
Figure 23. Serial-Port Timing for Fixed-Data-Rate Mode
CLKX/R
73
FSX (int)
FSX (ext)
78
76
77
70
79
Bit n − 1
75
Bit n − 2
Bit n − 3
Bit 0
DX
FSR
68
DR
Bit n − 1
Bit n − 2
Bit n − 3
71
72
NOTE A: Timings not expressly specified for variable-data-rate mode are the same as those for fixed-data-rate mode.
Figure 24. Serial-Port Timing for Variable-Data-Rate Mode
33
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