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SBAS424C –JUNE 2009–REVISED MARCH 2010
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Table 11. Offset Calibration Values
OFFSET AND FULL-SCALE CALIBRATION
REGISTERS
OFC REGISTER
7FFFFFh
FINAL OUTPUT CODE(1)
800001h
The conversion data are scaled by offset and gain
registers before yielding the final output code. As
shown in Figure 54, the output of the digital filter is
first subtracted by the offset register (OFC) and then
multiplied by the full-scale register (FSC). Equation 7
shows the scaling:
000001h
FFFFFFh
000000h
000000h
FFFFFFh
800001h
000001h
7FFFFFh
FSC[2:0]
Final Output Data = (Input - OFC[2:0]) ´
400000h
(1) Ideal output code excluding noise and inherent offset error.
FSC[2:0] Registers
(7)
The full-scale calibration is a 24-bit word, composed
of three 8-bit registers, as shown in Table 14. The
full-scale calibration value is 24-bit, straight binary,
normalized to 1.0 at code 400000h. Table 12
summarizes the scaling of the full-scale register. A
register value of 400000h (default value) has no gain
correction (gain = 1). Note that while the gain
calibration register value corrects gain errors above 1
(gain correction < 1), the full-scale range of the
analog inputs cannot exceed 105% full-scale to avoid
input overload.
The values of the offset and full-scale registers are
set by writing to them directly, or they are set by
calibration commands.
OFC[2:0] Registers
The offset calibration is a 24-bit word, composed of
three 8-bit registers, as shown in Table 13. The offset
is in twos complement format with a maximum
positive value of 7FFFFFh and a maximum negative
value of 800000h. This value is subtracted from the
conversion data. A register value of 00000h has no
offset correction (default value). Note that while the
offset calibration register value can correct offsets
ranging from –FS to +FS (as Table 11 shows), to
avoid input overload, the analog inputs cannot
exceed 105% full-scale.
Table 12. Full-Scale Calibration Register Values
FSC REGISTER
800000h
GAIN FACTOR
2.0
1.0
0.5
0
400000h
200000h
000000h
AINP
AINN
+
Output Data
Clipped to 24 Bits
Digital
Filter
´
Final Output
S
Modulator
-
OFC
Register
FSC Register
400000h
Figure 54. Calibration Block Diagram
Table 13. Offset Calibration Word
REGISTER
OFC0
BYTE
BIT ORDER
LSB
MID
MSB
B7
B15
B6
B5
B4
B3
B2
B1
B9
B0 (LSB)
OFC1
B14
B22
B13
B21
B12
B20
B11
B19
B10
B18
B8
OFC2
B23 (MSB)
B17
B16
Table 14. Full-Scale Calibration Word
REGISTER
FSC0
BYTE
LSB
BIT ORDER
B7
B15
B6
B5
B4
B3
B2
B1
B9
B0 (LSB)
B8
FSC1
MID
B14
B22
B13
B21
B12
B20
B11
B19
B10
B18
FSC2
MSB
B23 (MSB)
B17
B16
26
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