PCM9211
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SBAS495 –JUNE 2010
ADC Level Detect and Interrupt
The PCM9211 has the ability to monitor audio inputs, which can be used to trigger interrupt outputs on port INT1.
The ADC has a level monitor that can be set so that INT1 can be triggered whenever a specific level (referenced
to 0dBFS) is crossed. A block diagram for this function is shown in Figure 18.
MainPort/MPIO
Matrix
MainPort/
MPIOs
ADC Core
24
Level
Detector
SPI/I2C
INT
8
REG
ADDTLV[1:0]
ERROR
NPCM
EMPH
DTSCD
CSRNW
PCRNW
FSCHG
ERROR/INT0
NPCM/INT1
7
2
ERROR/
NPCM
DIR Core
ERROR
NPCM
Figure 18. Block Diagram for ADC Level Detection
Operation of the level detect circuitry is shown in Figure 19. The ADC level detect is flagged when either ADC
channel goes high. The flag is cleared when Register 2Dh is read.
VINL
VINR
LVL DET Flag
NPCM/INT1 pin
Register 2Dh_B0
SPI/I2C
Read Register 2Dh
Figure 19. Operation of the ADC Level Detect Circuitry
Copyright © 2010, Texas Instruments Incorporated
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