5.22 PM Next Item Pointer Register
The next item pointer register is used to indicate the next item in the linked list of PCI power management capabilities.
The next item pointer returns E4h in compact PCI mode, indicating that the PCI2250 supports more than one
extended capability, but in all other modes returns 00h, indicating that only one extended capability is supported.
Bit
7
6
5
4
3
2
1
0
Name
Type
Default
Next item pointer
R
1
R
1
R
1
R
R
0
R
1
R
0
R
0
0
Register:
Type:
Offset:
Default:
Next item pointer
Read-only
DDh
E4h Compact PCI mode
00h All other modes
5.23 Power Management Capabilities Register
ThepowermanagementcapabilitiesregistercontainsinformationonthecapabilitiesofthePCI2250functionsrelated
to power management. The PCI2250 function supports D0, D1, D2, and D3 power states when MS1 is low. The
PCI2250 does not support any power states when MS1 is high. See Table 5–19 for a complete description of the
register contents.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Type
Default
Power management capabilities
R
0
R
0
R
0
R
0
R
0
R
1
R
1
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
1
R
0
Register:
Type:
Offset:
Default:
Power management capabilities
Read-only
DEh
0602h or 0001h
Table 5–19. Power Management Capabilities Register
BIT
TYPE
FUNCTION
PME support. This five-bit field indicates the power states that the device supports asserting PME. A 0 for any of these bits
indicates that the PCI2250 cannot assert PME signal from that power state. For the PCI2250, these five bits return 00000b
when read, indicating that PME is not supported.
15–11
R
R
D2 support. This bit returns 1 when MS0 is 0, indicating that the bridge function supports the D2 device power state. This
bit returns 0 when MS0 is 1, indicating that the bridge function does not support the D2 device power state.
10
D1 support. This bit returns 1 when MS0 is 0, indicating that the bridge function supports the D1 device power state. This
bit returns 0 when MS0 is 1, indicating that the bridge function does not support the D1 device power state.
9
8–6
5
R
R
R
Reserved. Bits 8–6 return 0s when read.
Device specific initialization. This bit returns 0 when read, indicating that the bridge function does not require special
initialization (beyond the standard PCI configuration header) before the generic class device driver is able to use it.
4
3
R
R
Auxiliary power source. This bit returns a 0 because the PCI2250 does not support PME signaling.
PMECLK. This bit returns a 0 because the PME signaling is not supported.
Version. This three-bit register returns the PCI Bus Power Management Interface Specification revision.
2–0
R
001 = Revision 1.0, MS0 = 1
010 = Revision 1.1, MS0 = 0
5–19
TI [ TEXAS INSTRUMENTS ]
