XIO3130
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SLLS693F–MAY 2007–REVISED JANUARY 2010
4.3 PCI Express Downstream Port Registers
The default reset domain for all downstream port registers is SBRST. Some register fields are placed in a
different reset domain from the default reset domain; all bit and field descriptions identify any unique reset
domains. Generally, all sticky bits are placed in the GRST domain and all (non-sticky) EEPROM loadable
bits are placed in the PERST domain.
4.3.1 PCI Configuration Space (Downstream Port) Register Map
Table 4-50. PCI Express Downstream Port Configuration Register Map (Type 1)
Register Name
Offset
000h
Device ID
Status
Vendor ID
Command
004h
Class Code
Revision ID
008h
BIST
Header Type
Latency Timer
Cache Line Size
00Ch
Reserved
010h-014h
018h
Secondary Latency Timer
Subordinate Bus Number
Secondary Bus Number
I/O Limit
Primary Bus Number
I/O Base
Secondary Status
01Ch
Memory Limit
Memory Base
020h
Pre-fetchable Memory Limit
Pre-fetchable Memory Base
024h
Pre-fetchable Base Upper 32 Bits
Pre-fetchable Limit Upper 32 Bits
028h
02Ch
I/O Limit Upper 16 Bits
I/O Base Upper 16 Bits
030h
Reserved
Capabilities Pointer
034h
Reserved
Reserved
038h
Bridge Control
Interrupt Pin
Interrupt Line
PM CAP ID
03Ch
040h-04Ch
050h
Power Management Capabilities
Next-item Pointer
PM Data (RSVD)
PMCSR_BSE
Power Management CSR
054h
Reserved
058h-06Ch
070h
MSI Message Control
Next-item Pointer
MSI CAP ID
MSI Message Address
074h
MSI Upper Message Address
078h
Reserved
Reserved
MSI Message Data
Next-item Pointer SSID/SSVID CAP ID
Subsystem Vendor ID
07Ch
080h
Subsystem ID
084h
Reserved
Next-item Pointer
088h-08Ch
090h
PCI Express Capabilities Register
Device Status
PCI Express Capability ID
Device Capabilities
Link Capabilities
Slot Capabilities
094h
Device Control
098h
09Ch
Link Status
Link Control
Slot Control
0A0h
A4h
Slot Status
A8h
Reserved
TI Proprietary
General Control
Reserved
0ACh-0C4h
0C8h-0D0h
0D4h
0D8h-0E8h
0ECh
General Slot Info
Reserved
LOs Idle Timeout
Reserved
0F0h-0FCh
Copyright © 2007–2010, Texas Instruments Incorporated
XIO3130 Configuration Register Space
87
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