DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
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2.9 Mailbox Module Overview
The device Mailbox module facilitates communication between the ARM Cortex-A8 and the Media
Controller. It consists of twelve mailboxes, each supporting a 1-way communication between two of the
above processors. The sender sends information to the receiver by writing a message to the mailbox
registers. Interrupt signaling is used to notify the receiver that a message has been queued or to notify the
sender about an overflow situation.
The Mailbox module supports the following features (see Figure 2-2):
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•
•
•
•
•
12 mailboxes
Flexible mailbox-to-processor assignment scheme
Four-message FIFO depth for each message queue
32-bit message width
Message reception and queue-not-full notification using interrupts
Three interrupts (one to ARM Cortex-A8 and two to Media Controller)
Mailbox Module
Mailbox
Mailbox
Mailbox
Mailbox
Mailbox
Mailbox
Mailbox
Mailbox
Mailbox
Mailbox
Mailbox
Mailbox
L4
Interconnect
Interrupt
Interrupt
Interrupt
ARM Cortex-A8
Media Controller
Figure 2-2. Mailbox Module Block Diagram
14
Device Overview
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