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SPRS717F –OCTOBER 2011–REVISED APRIL 2013
16-Bit DDR3
Interface
8-Bit DDR3
Devices
DDR_D15
DQ7
DQ0
8
DDR_D8
DDR_DQM1
DM/TDQS
TDQS#
DQS
NC
DDR_DQS1
DDR_DQSn1
DQS#
DDR_D7
DQ7
DQ0
8
DDR_D0
DDR_DQM0
DM/TDQS
TDQS#
DQS
NC
DDR_DQS0
DDR_DQSn0
DQS#
0.1 µF
Zo
DDR_CK
CK
CK
VDDS_DDR
DDR_CKn
CK#
CK#
Zo
DDR_ODT
DDR_CSn0
DDR_BA0
DDR_BA1
DDR_BA2
ODT
ODT
CS#
BA0
BA1
BA2
CS#
BA0
BA1
BA2
DDR_VTT
Zo
DDR_A0
A0
A0
15
Zo
DDR_A15
A15
A15
DDR_CASn
DDR_RASn
DDR_WEn
CAS#
RAS#
WE#
CAS#
RAS#
WE#
DDR_CKE
CKE
CKE
DDR_RESETn
DDR_VREF
RESET#
ZQ
RESET#
ZQ
ZQ
ZQ
VREFDQ
VREFCA
VREFDQ
VREFCA
DDR_VREF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
DDR_VTP
49.9 Ω
( 1%, 20 mW)
Zo
ZQ
Termination is required. See terminator comments.
Value determined according to the DDR3 memory device data sheet.
Figure 5-49. 16-Bit DDR3 Interface Using Two 8-Bit DDR3 Devices
Copyright © 2011–2013, Texas Instruments Incorporated
Peripheral Information and Timings
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