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AM3352BZCZD80 参数 Datasheet PDF下载

AM3352BZCZD80图片预览
型号: AM3352BZCZD80
PDF下载: 下载PDF文件 查看货源
内容描述: 的Sitara AM335x ARM Cortex-A8的微处理器(MPU ) [Sitara AM335x ARM Cortex-A8 Microprocessors (MPUs)]
分类和应用: 微控制器和处理器外围集成电路微处理器时钟
文件页数/大小: 236 页 / 2887 K
品牌: TI [ TEXAS INSTRUMENTS ]
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AM3359, AM3358, AM3357  
AM3356, AM3354, AM3352  
www.ti.com  
SPRS717F OCTOBER 2011REVISED APRIL 2013  
5.6.2.2.2.10 DDR_VREF Routing  
DDR_VREF is used as a reference by the input buffers of the DDR2 memories as well as the AM335x  
device. DDR_VREF is intended to be half the DDR2 power supply voltage and should be created using a  
resistive divider as shown in Figure 5-39 and Figure 5-40. Other methods of creating DDR_VREF are not  
recommended. Figure 5-43 shows the layout guidelines for DDR_VREF.  
DDR_VREF Bypass Capacitor  
DDR2 Device  
A1  
DDR_VREF Nominal Minimum  
Trace Width is 20 Mils  
AM335x  
A1  
Neck down to minimum in BGA escape  
regions is acceptable. Narrowing to  
accommodate via congestion for short  
distances is also acceptable. Best  
performance is obtained if the width  
of DDR_VREF is maximized.  
Figure 5-43. DDR_VREF Routing and Topology  
Copyright © 2011–2013, Texas Instruments Incorporated  
Peripheral Information and Timings  
167  
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Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352  
 
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