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SPRS717F –OCTOBER 2011–REVISED APRIL 2013
16-Bit LPDDR
Device
AM335x
DDR_D0
DQ0
DDR_D7
DQ7
LDM
LDQS
DDR_DQM0
DDR_DQS0
NC(A)
DDR_DQSn0
DDR_D8
DQ8
DDR_D15
DDR_DQM1
DDR_DQS1
DDR_DQSn1
DQ15
UDM
UDQS
NC(A)
NC
DDR_ODT
DDR_BA0
DDR_BA1
DDR_BA2
T
BA0
BA1
T
NC
DDR_A0
T
A0
DDR_A15
T
T
A15
CS
DDR_CSn0
DDR_CASn
DDR_RASn
DDR_WEn
DDR_CKE
DDR_CK
CAS
RAS
T
T
T
T
T
T
WE
CKE
CK
CK
DDR_CKn
DDR_VREF
NC
DDR_RESETn
DDR_VTP
NC
49.9 Ω
( 1%, 20 mW)
A. Enable internal weak pulldown on these pins. For details, see the EMIF section of the AM335x Sitara ARM Cortex A-8
Microprocessors (MPUs) Technical Reference Manual (literature number SPRUH73).
B. For all the termination requirements, see Section 5.6.2.1.2.9.
Figure 5-33. 16-Bit LPDDR Interface Using One 16-Bit LPDDR Device
Copyright © 2011–2013, Texas Instruments Incorporated
Peripheral Information and Timings
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