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SPRS717F –OCTOBER 2011–REVISED APRIL 2013
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GPMC_FCLK
GNF1
GNF2
GNF6
GNF5
gpmc_csn[x]
gpmc_be0n_cle
gpmc_advn_ale
gpmc_oen
GNF0
gpmc_wen
GNF3
GNF4
gpmc_ad[15:0]
Command
(1) In gpmc_csn[x], x is equal to 0, 1, 2, 3, 4 or 5.
Figure 5-28. GPMC and NAND Flash—Command Latch Cycle
GPMC_FCLK
gpmc_csn[x]
GNF1
GNF7
GNF6
gpmc_be0n_cle
gpmc_advn_ale
gpmc_oen
GNF8
GNF9
GNF0
gpmc_wen
GNF3
GNF4
Address
gpmc_ad[15:0]
(1) In gpmc_csn[x], x is equal to 0, 1, 2, 3, 4 or 5.
Figure 5-29. GPMC and NAND Flash—Address Latch Cycle
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Peripheral Information and Timings
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