欢迎访问ic37.com |
会员登录 免费注册
发布采购

AM3352BZCZD80 参数 Datasheet PDF下载

AM3352BZCZD80图片预览
型号: AM3352BZCZD80
PDF下载: 下载PDF文件 查看货源
内容描述: 的Sitara AM335x ARM Cortex-A8的微处理器(MPU ) [Sitara AM335x ARM Cortex-A8 Microprocessors (MPUs)]
分类和应用: 微控制器和处理器外围集成电路微处理器时钟
文件页数/大小: 236 页 / 2887 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号AM3352BZCZD80的Datasheet PDF文件第143页浏览型号AM3352BZCZD80的Datasheet PDF文件第144页浏览型号AM3352BZCZD80的Datasheet PDF文件第145页浏览型号AM3352BZCZD80的Datasheet PDF文件第146页浏览型号AM3352BZCZD80的Datasheet PDF文件第148页浏览型号AM3352BZCZD80的Datasheet PDF文件第149页浏览型号AM3352BZCZD80的Datasheet PDF文件第150页浏览型号AM3352BZCZD80的Datasheet PDF文件第151页  
AM3359, AM3358, AM3357  
AM3356, AM3354, AM3352  
www.ti.com  
GPMC_FCLK  
SPRS717F OCTOBER 2011REVISED APRIL 2013  
GNF12  
GNF10  
GNF15  
gpmc_csn[x]  
gpmc_be0n_cle  
gpmc_advn_ale  
GNF14  
GNF13  
gpmc_oen  
gpmc_ad[15:0]  
DATA  
gpmc_wait[x]  
(1) GNF12 parameter illustrates amount of time required to internally sample input data. It is expressed in number of GPMC functional  
clock cycles. From start of read cycle and after GNF12 functional clock cycles, input data will be internally sampled by active  
functional clock edge. GNF12 value must be stored inside AccessTime register bits field.  
(2) GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.  
(3) In gpmc_csn[x], x is equal to 0, 1, 2, 3, 4 or 5. In gpmc_wait[x], x is equal to 0 or 1.  
Figure 5-30. GPMC and NAND Flash—Data Read Cycle  
GPMC_FCLK  
GNF1  
GNF6  
gpmc_csn[x]  
gpmc_be0n_cle  
gpmc_advn_ale  
gpmc_oen  
GNF9  
GNF0  
gpmc_wen  
GNF3  
GNF4  
gpmc_ad[15:0]  
DATA  
(1) In gpmc_csn[x], x is equal to 0, 1, 2, 3, 4 or 5.  
Figure 5-31. GPMC and NAND Flash—Data Write Cycle  
Copyright © 2011–2013, Texas Instruments Incorporated  
Peripheral Information and Timings  
147  
Submit Documentation Feedback  
Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352  
 复制成功!